LM555 and LM556 Timer Circuits
If you would like to use any of these ideas, take the time to do some testing before using the LM555 timer in an actual circuit. All of the solutions on this page can also be applied to the LM556 - Dual timer.
Some of the circuits on this page were developed just to see if they would work and have no intended use.
The menu below links to various sections of this page that relate to the items in the index. New additions appear at the bottom of the list.
- - TIMER PAGE SECTIONS - -
- RESET And CONTROL Input Terminal Notes
- LM555 - Monostable Oscillator Calculator
- LM555 - Astable Oscillator Calculator + Capacitor Calculator
- Basic Circuits For The LM555 Timer
- Triggering And Timing Helpers For Monostable Timers
- Controlling Circuits For LM555 Timers
- Advanced Circuits For The LM555 Timer
- LM556 Timers with Complimentary or Push-Pull Outputs
- Interlocked Monostable Timers
- Power-Up Reset For Monostable Timers
- Cross Canceling For Monostable Timers
- RS - Flip-Flop Made With A LM556 Timer
- Using The LM555 As A Voltage Comparator Or Schmitt Trigger
- 50% Output Duty Cycle (Variable)
- Bipolar LED Driver
- Electronic Time Constant Control
- Voltage Controlled Pulse Width Oscillator
- Sweeping Output Siren
- D Type Flip-Flop Made With A LM556 Timer
- Time Delay Circuits
- Variable Period Oscillator (CD4017)
- Missing Pulse Detectors / Negative Recovery Circuits
- 50% Output Duty Cycle (Fixed) Using Logic Devices
- Three Stage Cycling Timer Circuit (Traffic Light Circuit)
- RESET Terminal - Currents And Voltages
- 555 Timer Current Draws
- Delayed Re-Triggering
- 555 Timer Output Section
- Power ON Delay Circuits
- Power OFF Delay Circuits
- Average 51.5 % Output Duty Cycle Using A 555 Timer
- Driving Loads Of Greater Than 15 Volts Or 200 Milliamps
- 'N' Steps And Stop Circuit (CD4017)
- Multiple - Monostable Trigger Inputs
- Timer Output Voltage Losses
- RC Delayed Timer Triggering
- Threshold Terminal Current Limiting
- Other Related Pages -
CMOS Versions Of The 555 Timer
However, the CMOS versions have a lower output current rating and may not be able to drive some loads. Also, the outputs of some CMOS timers can source more current than they can sink.
For single sided loads, an NPN or PNP driver transistor can be added to the output of the timer to increase the current capacity of the timer. ( See section 31 of this page for more information. )
This Page Is Not Applicable To The LM558
The differences include: (1) The output of each 558 timer is an open collector transistor with a 100 milliamp current capacity while the 555 and 556 timers have bipolar outputs with a 200 milliamp capacity. (2) The TRIGGER input of the 558 is EDGE Triggered while the TRIGGER input of the 555 and 556 timers are LEVEL Triggered.
Individual LM558 timers are not designed to operate in an astable mode. Two 558 timers must be connected in a loop to make an astable oscillator.
- EDGE Triggered - means that the change in the output state of the timer is caused by a quickly falling or rising voltage at the input terminal. If the input voltage changes too slowly the output will not switch states.
- LEVEL Triggered - means that the change in the output
state of the timer is caused when the voltage at an input terminal falls
bellow or rises above a preset level. The rate at which the voltage
changes is not important.
LM555 Timer Internal Circuit Block Diagram
LM555 Timer Internal Circuit Block Diagram
LM556 Timer Internal Circuit Block Diagram
RESET And CONTROL Terminal Notes
If the RESET terminal of a 555 or 556 timer is not going to be used, it is normal practice to connect this input to the supply voltage. If the RESET terminal is left unconnected the operation of the timer will not be affected, however, the RESET of CMOS version of these timers should not be left unconnected as the inputs of these devices are more sensitive and this may cause problems.
In many cases the CONTROL input does not require a bypass capacitor if a well regulated power supply is used. However, it is good practice to place a 0.1 microfarad (C2) capacitor at this terminal to minimize voltage spikes during transitions of the timer's output transistors.
It is also good practice to place a 0.1uF bypass capacitor (C1) across the power supply and located as close to the IC as possible. This will also reduce voltage spikes when the output transistors of the timer change states.
Typical Pin 4 And 5 Connections
For example; If the power supply - ripple voltage is 120 Hz and the oscillator frequency is 1000 Hz then C2 will have greater benefit than if the oscillator frequency is 10 Hz.
Therefore, at low astable frequencies or long monostable times the effectiveness of a capacitor at the CONTROL input is less than at higher frequencies and short pulse times.
Calculation Value Notes
For ease of use, the calculators on this page have capacitor values entered in microfarads. This value is multiplied by the calculator to produce the correct result. (1uF = 0.000,001F = 1-6F)
TIMING CALCULATORS FOR THE LM555
NOTE: The leakage currents of electrolytic capacitors will affect the actual output results of the timers. To compensate for leakage it is often better to use a higher value capacitor and lower value resistors in the timer circuits.
LM555 Monostable Oscillator Circuit Diagram
LM555 Monostable Oscillator Output Time Chart
NOTE: The leakage currents of electrolytic capacitors will affect the actual output results of the timers. To compensate for leakage it is often better to use a higher value capacitor and lower value resistors in the timer circuits.
LM555 Astable Oscillator Circuit Diagram
The next calculator can find the capacitance needed for a particular output frequency if the values of R1 and R2 are known.
LM555 Astable Oscillator - Free Running Frequency Chart
Basic Circuits For The LM555 Timer
Circuit 1
Circuit 2
Circuit 3
Circuit 4
Circuit 5
Triggering And Timing Helpers For Monostable Timers
The following schematic shows two additions to the basic 555 timer circuit. One reduces the trigger sensitivity and the other will double the output pulse duration without increasing the values of R1 and C1.
555 Timer Helpers Schematic
The value of the 0.1uF capacitor at the trigger terminal can be made larger to further delay the triggering of the timer when the input goes LOW. Other values can be used in place of the 470K resistor as well.
The second addition is a helper that will extend the timers output duration without having to use large values of R1 and/or C1. Connecting a 1.8K ohm resistor between the supply voltage and pin 5 of the 555 timer chip the output pulse duration will be approximately doubled.
The boxed in area of the drawing shows the internal circuit at pin 5 of the timer with the 1.8K resistor added. The voltage at pin 5 will be increased from 0.66Vcc to 0.88Vcc which is approximately equal to the voltage across the capacitor after two time constants*. This allows the same output time to be achieved with a smaller resistance or capacitance value thus reducing the error caused by the capacitor leakage current. Conversely, for a given value of R1 and C1, the output time will be doubled by the addition of the resistor at Pin 5.
* - One time constant is equal to R (Ohms) times C (Farads) in seconds. In terms of voltage, one time constant is equal to a rise in voltage across the capacitor from 0 to 63.2 percent its maximum voltage. (1uF = 0.000,001F = 1 X 10-6F)
The trigger and reset voltage levels of the timer will also be increased with the addition of the resistor to pin 5 but this should have no effect in most applications.
To achieve long output times, electrolytic capacitors are often used for C1 and the value of R1 can be as high as 1 Megohm. However with high resistance values for R1 the leakage current of the timing capacitor (C1) becomes a significant factor in the operation of the timer.
The circuit will run much longer than expected and may never time out if the leakage current is equal to the current through the resistor at some voltage. Tantalum capacitors could be used as they have very low leakage currents but these are expensive and not available in large capacitance values.
Adding a resistor to the CONTROL terminal is not an ideal solution to solving long duration timing situations but should work for pulse times of less than ten minutes.
Reversed Trigger Input Control Of 555 Timers
Reversed Trigger Input
Controlling Circuits For LM555 Timers
LM555 Control methods #1 schematic
Advanced Circuits For The LM555 Timer
The parts values in these circuits were selected for testing purposes and can be adjusted to suit the needs of a particular application as long as the normal operating parameters of the LM555 are maintained.
Before using any of these circuits for specific applications they should be tested to determine the best values for the components and the practicality of their use.
LM556 Timers with Complimentary or Push-Pull Outputs
This is done by connecting the OUTPUT of timer A to the TRIGGER and THRESHOLD terminals of timer B. The 10K ohm resistor limits the current that can flow into the THRESHOLD terminal of timer B.
Due to the ability of the timers to source or sink current, the current from one timers output can flow into the other timer's output depending on which output is HIGH or LOW. The typical output conditions that are referenced to ground or supply are also available and in fact all three could be used at the same time.
Circuits for both Astable and Monostable versions of this method are shown on the diagram.
LM555 Complimentary Outputs schematic
Normal triggering methods and period lengths are not affected.
Both timer's RESET terminals are available and can be used individually or together.
Due to the unusual nature of this type of circuit testing should be done to determine if it is suitable for the use intended. The circuit is usable at frequencies below 1000 Hz.
Interlocked Monostable Timers
This is done by connecting the OUTPUT of each timer to the TRIGGER of the other through a diode and placing a resistor in the trigger circuit. The resistor limits the current from the opposite timers output when the trigger is closed on the stopped timer.
LM555 Interlocked Timers schematic
Power-Up Reset For 555 Timers
Stray capacitance can be from a number of sources but a typical cause is the wires that connect a push button used to start the timer.
In an ideal circuit, where there is no stray capacitance at the TRIGGER input, a small capacitor at the CONTROL terminal could prevent the timer from triggering .
LM555 Power-Up - Ideal Circuit Conditions
Practical Circuit Conditions
To prevent timer from starting, a simple RC timing circuit can be added to the timer's RESET terminal so that when power is applied to the circuit, the timer is automatically held RESET by transistor Q1 until C1 is almost fully charged.
The length of the resetting action can roughly be determined by R1 X C1 X 3 .
The example circuit shows a monostable oscillator but the method could also hold an astable 555 oscillator in a reset condition at power-up.
LM555 Power-Up Reset Method 1
LM555 Power-Up Reset Method 2
Cross Canceling For Monostable Timers
This means that only one timer can be running at a time.
As with the 'Power-Up Reset For Monostable Timers' circuit above, when the power is applied to the circuit both timers are RESET.
LM555 Cross Canceling Timers schematic
The trigger switch of the running timer must be OPEN for the RESET to occur.
RS Flip-Flop Made With A LM556 Timer
The design is crude but effective for very low speed applications. Its greatest asset is that the outputs of the LM556 are capable of driving current loads of up to 200 milliamps with a minimal voltage loss.
This circuit was originally developed to drive "Stall Motor" type switch machines that are used on model railroads. These motors operate on 12 volts, or less, and draw approximately 15 milliamps when they are stalled.
Due to the design of the LM556 timer chip there are multiple output options available in this circuit. These include the normal timer outputs which are bipolar and the DISCHARGE terminals, (PINS 1 and 13), that are open collector circuits.
LM556 Flip-Flop Truth Table
Logic Function diagram
LM556 Flip-Flop Input Options
Input Options schematic
In circuit B the SET input is switched between 0 Volts and Vcc, the supply voltage, to change the state of the Flip-Flop. The RESET terminal is unconnected.
In both circuit A and B, when the push buttons are OPEN the Flip-Flop will remain in its last state until the opposite signal is applied to an input.
Circuits A and B also show two methods of connecting the LED's at terminals 1 and 13. The input method in circuit B would not be practical to produce the STATE 3 condition shown in the Truth Table on the previous diagram.
LM556 Flip-Flop Notes
- If you would like to make use of this type of circuit,
please take the time to build one and do some experimenting to
determine if the design will suit your needs.
- This circuit was developed for low speed operation.
It was found however to operate satisfactorily at clock speeds in excess
of 10 kHz.
The values of R1 and R2 in this test were 100K ohms. The value of R3 was 22K ohm.
- As can be seen in the schematics, the OUTPUT of one
timer is fed, through a 10K ohm current limiting resistor (R1 and R2),
to the TRIGGER and THRESHOLD inputs of the other. The value of this
resistor is not critical and is largely dependent on the impedance of
the INPUT devices used to trigger the stage changes.
If resistors R1 and R2 are not used the operation of the circuit becomes unstable.
- Due to the internal circuitry at THRESHOLD terminals
(PINs 6 and 12) of the LM556 timers, resistors R3 and R4 are needed to
limit the current that can flow into these terminals. The value of
resistors R3 and R4 should be approximately 1/4 the value of resistors
R1 and R2 so that the proper voltage ratios for changing states can be
achieved.
The R3 resistor is not required if the inputs are not going to be driven to a HIGH state.
- The cross coupling of the timers OUTPUT and
TRIGGER/THRESHOLD terminals gives the circuit its FLIP-FLOP action and
causes the outputs of the timers to be forced alternately HIGH or LOW.
This action only applies to states 1 and 2 in the truth table shown
above.
- For this circuit to have a memory function such as
that of a SET / RESET type Flip-Flop the input terminals must float
when no input signal is present. They cannot be held HIGH or LOW as is
the case with TTL devices.
- The maximum current the the outputs of the LM556 timers can source or sink is 200 milliamps.
- These circuits do not need a regulated power supply but the voltage should be well filtered.
- Any of the LED's in the circuit could be replaced by an optoisolator, small relay or low current DC motor.
LM555 Timer Used As A Voltage Comparator Or Schmitt Trigger
Shown on the schematic is a secondary output that uses the open collector at the DISCHARGE terminal (Pin 7) of the timer. This output can sink up to 200 milliamps and would be ideal for driving relays.
The main disadvantage to using this circuit is the the large dead-band (1/3Vcc) between upper and lower threshold voltages. An optional resistor, R5, can be added to the circuit to lower and compress the detection voltage range but this only partially alleviates the problem.
LM555 Voltage Comparator / Schmitt Trigger
The two graphs at the bottom of the diagram show the input voltages at which the OUTPUT of the LM555 will change states. The effect that resistor R5 has on the circuit can be seen in the right hand graph.
50% Output Duty Cycle (Variable)
Resistors R1 and R2 were selected first and then resistor R3 was selected to give the best control range based on measurements at the output of the timer.
The major disadvantage of using the LM555 in this manner is that the output frequency changes as the duty cycle changes.
50% Duty Cycle schematic
For The Record
Not Accurate 50% Duty Cycle schematic
Bipolar LED Driver
Two SPDT switches are used to set the input conditions but these could be replaced by electronic controls.
Bipolar LED Driver schematic
Electronic Time Constant Control
The advantage of switch the timing capacitors is that the duty cycle of the timer is not affected when the frequency is changed.
Electronic Time Constant Control
Voltage Controlled Pulse Width Oscillator
The following diagram shows a basic circuit with an open collector output that would require a pull up resistor at its output. The parts values are the nominal values of the components used.
Note: This circuit is not suitable for high frequency operation, especially when using a second timer as the output stage.
Variable Pulse Width Oscillator
The following is a graph of the output pulse width of the basic circuit for a given control voltage input. All measurements were made with a good quality multimeter.
The PLUS and MINUS inputs of IC 2 can be reversed to produce a decreasing pulse width for an increasing control voltage.
Variable Pulse Width Oscillator Output Graph
The next diagram uses a second LM555 timer as a power output stage for the basic oscillator. The output stage also has an open collector output at the Discharge terminal, PIN 7, that could be used.
Variable Pulse Width Oscillator With LM555 Output
Sweeping Output Siren
Sweeping Output Siren
A better 555 based circuit for a sweeping oscillator would be to adapt the Variable Pulse Width Oscillator in the section above.
A still better choice for a sweeping oscillator is a Voltage Controlled Oscillator (VCO) IC. See this Wikipedia page for basic information on Voltage-controlled oscillators and this datasheet for the LM321.
Other devices include the TTL 74124 Dual Voltage-Controlled Oscillator and the CMOS CD4046B Phase-Locked Loop.
D Type Flip-Flop Made With A LM556 Timer
Each time the push button switch (S1) is closed the outputs of the timers will reverse so that one is HIGH and the other is LOW and vice versa. As with the D flip-flop the circuit acts as a binary divider.
D - Flip-Flop
The circuit has some output switching time lag due to the RC time constants at the inputs and the different Trigger and Threshold voltage levels of the timers themselves.
Time Delay Circuits
Time Recovery Delay Circuits
Two Stage Time Delay Circuit
Cascaded Time Delay Circuits
Example Circuit - 4 Stage Cascade Delay
BiDirectional Time Delay Circuit
Variable period Oscillator (CD4017)
The first circuit operates with a repeating ten step cycle. Each output pulse is longer than the previous until a count of ten is reached at which time the cycle will repeat.
The second circuit has a nine step cycle that stops at the end of the cycle. The cycle is restarted or reset when the RESET input is briefly made high.
The CD4017 can be configured to give count lengths between 1 and 10. Refer to the timing diagram in the CD4017 data sheet for a better understanding of the IC's operation.
CD4017 Data sheet - National Semiconductor (.pdf)
Variable Period Oscillator (Experimental)
The next schematic shows an alternate arrangement for the timing resistors. This would allow the subsequent output pulses to be of longer and shorter lengths during the cycle.
Alternate Resistor Arrangement
Ten Step / Two Period Oscillator
Missing Pulse Detector / Negative Recovery Circuits
Basic - Negative Recovery Circuit
The diode across R1 in these circuits causes C1 to quickly discharge when the power to the circuit is switched off. This allows the circuit to be ready for the next cycle more quickly.
Basic - Missing Pulse Detectors
Steady Output - Missing Pulse Detectors - Two Comparators
Steady Output - Missing Pulse Detectors - Two Timers
Latching Output - Missing Pulse Detector
Manual Start - Missing Pulse Detector
Fixed 50% Output Duty Cycle Using Logic Devices
Fixed 50% Output Duty Cycle
Three Stage - Cycling Timer Circuit
NOTE All three timers in this circuit will start when power is applied, therefore all but the first timer (A) will need to be Reset for the proper cycle order to be started automatically. (See item 10 in the index of this page for a method of resetting the timers.)
A Single - Traffic Light Driver Circuit - Based On The Cycling Timer Circuit
Devices Used For The Following Tests
RESET Terminal - Currents And Voltages
The only conclusion to be drawn here is that the RESET terminal should be held below 0.3 Volts to ensure that any of the devices is fully reset.
In the transition voltage range of the RESET terminal mentioned on the diagram, the timers output is neither fully ON or OFF. This can cause high current flows in the timer itself. The voltage at the RESET terminal should pass through this range as quickly as possible to avoid problems.
RESET Terminal - Currents And Voltages
555 Timer Current Draws
The RESET terminal current draw illustrates the need for a current limiting resistor as shown in some of the preceding circuits. Some devices will not function properly if the current to the THRESHOLD terminal is not restricted.
Timer Current Draws
Delayed Re-Triggering
Delayed Re-Trigger
Timer Output Section
When the output of the timer is HIGH, it can supply current to a load. When the output of the timer is LOW, it can receive current from a load.
Transistor Q3 is actually connected as a diode with the collector not carrying current. Although a circuit common symbol is shown, the collector is not connected to the ground of the timer.
Output Circuit
Power ON Delay Circuits
These circuits are not ideal as the relays are closed when power is supplied to the circuit. This means that the power is supplied to the load for a very short period until the relay can open.
Power ON Delay Circuits
Delay Circuit With Indicator LED
Delayed Lock Out Circuit
PUJT & Voltage Comparator - Power On - Delay Circuits
Wait For Pulses - Delay Circuit
A resistor could be placed across capacitor C1 so that the timer will be reset if the pulses stop arriving. This resistor should have a resistance of at least three times the value of R1.
Power OFF Delay Circuits
Power OFF Delay Circuits
Average 51.5 % Output Duty Cycle Using A 555 Timer
At a supply voltage of 5 volts the average duty cycle increased to 52.7%. The span of the duty cycle also increased.
51.5% Duty Cycle Oscillator
Driving Loads Of Greater Than 15 Volts Or 200 Milliamps
Higher current loads can be driven by transistors with a suitable current capacity and adjusting the base current as needed. Darlington and MOSFET transistors can drive loads of many amps.
The 24 volt supply can be full wave DC and does not need to be filtered. The load's supply voltage could also be lower than the timer's supply voltage.
High Voltage And Current Load Drivers
'N' Steps And Stop Circuit (CD4017)
'N' Steps And Stop Circuit
Multiple - Monostable Trigger Inputs
Input signals that arrive before the current output pulse has ended will not be indicated (The circuit cannot be retriggered.)
This circuit is not ideal as a balance must be struck amongst the values of R1, C1 and R2 and there is a limit to the number of inputs based on this balance.
Multiple Trigger Inputs Circuit
Timer Output Voltage Losses
Voltage Losses For A HIGH Output
Voltage Losses For A LOW Output
RC Delayed Timer Triggering
Two recovery schemes are also shown on the diagram.
RC Delayed Timer Triggering
Threshold Terminal Current Limiting
If the current to the THRESHOLD terminal is not restricted the timer may malfunction. The current limiting resistor should be at least 1,000 ohms but can any higher value that is practical for the circuit. Using a higher value resistor will reduce the overall current usage of the entire circuit.
The important thing is for the THRESHOLD terminal not to be exposed to the supply voltage or other low impedance source such as the output of another 555 timer without limiting its current.
Threshold Terminal Current Limiting
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Please Read Before Using These Circuit Ideas
Although the circuits are functional, the pages are not meant to be full descriptions of each circuit but rather as guides for adapting them for use by others. If you have any questions or comments please send them to the email address on the Circuit Index page.
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